The invention relates generally to digital to analog converters (DACs) and, more particularly, relates to an improved voltage segmented DAC that requires no buffer.
Digital converters (DACs) are well known in the art, and are configured to convert a digital signal to a voltage, or an analog signal. In high speed or high resolution applications, conventional DACs suffer from their complexity bulkiness as a result of a large number of components, and often lack linearity.
Voltage segmented DACs are a conventional approach to this problem, and are configured with multiple stage resistor strings. In one example, a segmented DAC is configured in two stages with separate resistor strings that resolve two sets of digital bits, higher order and lower order bits. It has been observed, however, that the application of secondary or successive voltage segmenting elements has perturbed the precise operation of the primary or preceding elements. This configuration and other similar conventional approaches require a buffer or amplifier to isolate the secondary and successive voltage segmenting elements from the primary or preceding elements. Buffers and amplifiers add a large number of components to a circuit, and affect the speed and accuracy of operation of the circuit.
Therefore, there exists a need for an accurate DAC, but that does not require a buffer. As will be seen, the invention provides such a DAC in an elegant configuration.